CSCI 6300
Foundation of
Computer Systems
Syllabus for Fall
2006
Office :
Telephone : Office 381-3550
Email : jabraham@panam.edu
My Schedule
|
My TA: Reni
Daniel - rthomas@panam.edu
Stallings,
William. Computer
Organization & Architecture, Designing for Performance. Seventh Edition. 2006. Prentice Hall. ISBN 0-13-185644-8
Silberschatz, Abraham, Galvin, P.B., and Gane, G. Operating System Concepts. Seventh Edition. 2005. Wiley. ISBN: 0-471-69466-5
Recommended
Tanenbaum, Modern Operating Systems, 2nd Ed. Prentice Hall
Williams. Computer Systems Architecture, A
Networking Approach. Adison Wesley.
Tanenbaum. Structured
Computer Organization. 4th Edition. Prentice Hall.
Nutt. Operating Systems, A
Modern Perspective, 2nd Edition. Addisson
Wesley.
An understanding of the basic concepts of computing - programming and data structures, addressing modes (as used in assembly language), binary arithmetic and some knowledge of computer systems (main frame/minicomputers, microcomputers, networks). Students enrolled in CSCI 6300 are expected to have completed CSCI 1380, CSCI 2380 (CSCI 6302) and CSCI 2333 or their equivalent. Other completed courses that would help with understanding some of the material include CSCI 3333 and CSCI 3334 or CSCI 6301 but these are not integral. NOTE: This is a graduate leveling course that is roughly equivalent to CSCI 4334 and CSCI 4335. If you have taken both of these classes or their equivalent, this leveling course is not necessary. If you have taken either or neither of these courses, this course is required.
Course
Topics:
This course will present two separate although somewhat overlapping sets of material roughly equivalent to the two undergraduate courses CSCI 4334 (Operating Systems) and CSCI 4335 (Computer Architecture). From Computer Architecture, the course will present the architecture of modern computers including computer instruction sets and registers, the CPU including ALU components, the fetch-execute cycle and micro-code, other computer components including the system bus, main memory including cache and virtual-memory, input and output communications, and non-standard architectures including RISC, pipeline architectures and parallel processor architectures. The course will also introduce digital circuits and binary representations. From Operating Systems, the course will present operating system concepts including process scheduling, process synchronization issues and solutions, deadlock, various forms of memory management especially virtual memory, file and I/O systems, protection and security, and network and distributed operating systems.
Course
Structure:
The course will cover both Architecture and Operating System concepts. Roughly 60% of the time will be allocated to architecture and 40% to operating system.
Course
Assignments and Grading:
There will be one midterm and one final examination. These exams will constitute 60% of the grade. 25% of the grade will be for the assignment administered by my TA. The TA will be totally responsible for this portion of the grade. The remaining 15% of the grade will be for attendance, participation, daily quizzes and other reading I assign during the semester. Letter grades will be based on the following grading scale A: 90-100% B: 80-89% C: 70-79% F: 0-69%
For each day of class you will prepare 10 multiple choice questions (along with keys) over the material covered. Please bring two copies of the tests. These questions will be given as daily quizzes. 5 points will be given for good questions and 10 points for correct answers. Only multiple choice questions will be accepted. These quizzes may not be made up. Therefore, it is essential that you come to every class on time. The quizzes are given at the beginning of the class. Students arriving late may turn in their questions, but won’t be allowed to take the quiz.
If
you must miss an exam, make prior arrangements. No make-up exams will be given
unless you contact me in advance! Homework may be submitted to me by email or
hardcopy in my mailbox prior to class time. Late homework will be levied heavy
penalties. Penalty: One day late 10%, 1
week late 20%, 2 weeks late 50%. Not
accepted afterwards.
Note
to students with disabilities:
If you have a documented disability which will make it difficult for you to carry out the work as I have outlined and/or if you need special accommodations/assistance due to a disability, please contact the office of services for persons with persons disabilities (OSPD), Emilia Remirez-Schunior Hall, Room 1.101 immediately, or the Associate Director at Maureen@utpa.edu, ext. 7005. Appropriate arrangements/accommodations can be arranged.
Verification of disability and processing of special services required, such as notetakers, extended time tests, separate accommodations for testing, will be determined by OSPD. Please do not assume adjustments/accommodations are impossible. Please consult with the Associate Director, OSPD, at extension 7005.
Tentative Schedule: A = Architecture book, O = Operating System Book.
|
Week |
Chapters |
Topic |
|
1 |
10A,
1O |
Instruction
Set. Intro to OS |
|
2 |
12,
3 A |
Introduction,
History and Top Level View of a Computer. |
|
3 |
4
& 5 A |
Memory |
|
4 |
8,
9 O |
Memory
Management and Virtual memory |
|
5 |
6
& 7 A |
Storage
Devices and input/output modules |
|
6 |
12,
13, 16 O |
I/O
Systems, Mass Storage Structure and Distributed System Structures |
|
7 |
Catch
up & Exam |
|
|
8 |
8
A & 1, 2 O |
Operating
System Support |
|
9 |
3,
4 O |
Processes and Threads
|
|
10 |
5,
6, 7 O |
CPU
Scheduling and Process synchronization |
|
11 |
11A
|
catch
up and Addressing Modes |
|
12 |
12,
13 A |
Processor
structure and function, RISC |
|
13 |
14,
16 & 17 A |
Parallelism,
Control Unit |
|
13 |
14,
15 O |
|
|
|
|
|
|
14 |
FINAL |
Wrap
up and Final Exam |
Learning Outcomes:
1. Draw the structure of an IAS computer and describe how a small program is executed.
2. Given a bus width design an instruction set for an IAS computer and show the compromises that need to be made between number of instructions and addressable memory.
3. Describe the key design elements for interconnection of peripherals to the CPU.
4. Using diagrams show what happens in each of the sub-cycles of an instruction cycle.
5. Describe the memory hierarchy and calculate performance improvements.
6. Calculate block memory transfers between designated cache and main memory and show similarity of paging and explain resource management in a computer system.
7. Explain interaction between the hardware, the operating system, the application software and the user of a modern computer system.
8. Calculate performance improvements of a pipelined RISC.
9. Describe the need for different types of addressing modes
10. Describe the services an operating system provides to users and processes.
11. Differentiate between processes and threads and show why scheduling, creation, termination and communication are important. Describe various scheduling criteria and algorithm that may be used.
12. Describe importance of process synchronization and discuss classic problems of synchronization.